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FUJITSU SEMICONDUCTOR DATA SHEET
DS04-13506-1E
LINEAR IC
R-2R TYPE 8-BIT D/A CONVERTER WITH OPERATIONAL AMPLIFIER OUTPUT BUFFERS
MB88347
s DESCRIPTION
The Fujitsu MB88347 is an R-2R type 8-bit resolution digital-to-analog converter (DAC), designed for interface with a wide range of general 4-bit and 8-bit microcontrollers including Fujitsu's MB88200 family, MB8850 family, and MB88500 family 4-bit single-chip microcontrollers. The MB88347 has an 8-bit x 8-channel D/A converter with operational amplifier output buffers. Digital data are input serially by individual channel units. The loaded digital data are converted into analog DC voltages by the D/A converter in 100 s settling time. Also, the MB88347 has operational amplifier output buffers. These operational amplifier output buffers are connected to each channel of the D/A converter, and provide high current drive capability. The MB88347 is suitable for electronic volumes and replacement for potentiometers for adjustment, in addition to normal D/A converter applications.
s FEATURES
* * * * * * * Conversion method : R-2R resistor ladder 8-bit x 8-channel D/A converter with operational amplifier output buffers Max. 2.5 MHz Serial data input Serial data output for cascade connection Max. 100 s DAC output settling time Max. +1.0/-1.0 mA analog output sink/source current Two separate power supply/ground lines for MCU interface block/operational amplifier output buffer block and D/A converter block
(Continued)
s PACKAGE
MB88347-P MB88347-PF MB88347-PFV
PLASTIC DIP (DIP-16P-M04)
PLASTIC SOP (FPT-16P-M06)
PLASTIC SSOP (FPT-16P-M05)
This device contains cirduitry to protect the inputs against damage due to high static voltages or electric fields. However, it is advised that normal precautions be taken to avoid application of any voltage higher than maximum rated voltages to this high impedance circuit.
1
MB88347
(Continued)
* * * * * Pin compatible with MB88342 Single +5 V power supply Wide operating temperature range: -20C to +85C Silicon-gate CMOS process Three package options : 16-pin plastic DIP (Suffix : -P), 16-pin plastic SOP (Suffix : -PF), 16-pin plastic SSOP(Suffix : -PFV)
s PIN ASSIGNMENT
MB88347-P VSS AO2 AO3 AO4 AO5 AO6 AO7 VDD 1 2 3 4 (Top View) 5 6 7 8 12 11 10 9 LD DO AO8 VCC AO5 AO6 AO7 VDD 5 6 7 8 16 15 14 13 GND AO1 DI CLK 1 2 3 4
MB88347-PF
MB88347-PFV 16 15 14 13 GND AO1 DI CLK LD DO AO8 VCC VSS AO2 AO3 AO4 AO5 AO6 AO7 VDD 1 2 3 4 (Top View) 12 11 10 9 5 6 7 8 12 11 10 9 LD DO AO8 VCC 16 15 14 13 GND AO1 DI CLK
VSS AO2 AO3 AO4
(Top View)
Figure 1 Logic Symbol
+5 V +5 V
Shift Clock Input
CLK
VCC
VDD
8 AO1 - AO8 DAC Output
Data Input
DI
MB88347
Load Strobe Input
LD GND VSS
DO
Data Output
2
MB88347
s BLOCK DIAGRAM
VCC Digital Block (MCU Interface) CLK DI 12-bit Shift Register
GND
DO D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11
4-bit Address Decoder 8 8 D0 D1 D6 D7 1234 678
LD
D0 D1
D6 D7
8-bit Data Latch #1
8-bit Data Latch #8
R-2R Type 8-bit D/A Converter #1 Analog Block (D/A Converter with operational amplifier output buffers)
R-2R Type 8-bit D/A Converter #8
+ -
+ -
VDD*
AO1 * : Only for D/A converter block except operational amplifier block
AO8
VSS*
3
MB88347
s PIN DESCRIPTION
PIN ASSIGNMENT and Table 1 show the pin assignment and pin description of the MB88347. Table 1 Pin Description Symbol VCC GND VDD VSS Control Input CLK 13 I Shift clock input to the internal 12-bit shift register: At the rising edge of CLK data on the DI pin is shifted into the LSB of the shift register and contents of the shift register are shifted right (to the MSB). Load strobe input for a 12-bit address/data : A high level on the LD pin latches a 4-bit address (upper 4 bits: D11 to D8) of the internal 12-bit shift register into the internal address decoder, and writes 8-bit data (lower 8 bits: D7 to D0) of the shift register into an internal data latch selected by the latched address. Serial address/data input to the internal 12-bit shift register: The address/data format is that upper 4 bits (D11 to D8) indicate an address and lower 8 bits (D7 to D0) indicate data. The D11 (MSB) is the first-in bit and D0 (LSB) is the last-in bit. Serial address/data output from the internal 12-bit shift register: This is an output pin of the MSB bit data of the 12-bit shift register. This pin allows a cascade connection of the device. 8-bit resolution D/A converter outputs : 8 channels (AO1 to AO8) Each output channel has an operational amplifier output buffer for analog output data. Pin No. 9 16 8 1 Type -- -- -- -- Name & Function +5 V DC power supply pin for the digital block (MCU interface) and operational amplifier output buffers. Ground pin for the digital block (MCU interface) and operational amplifier output buffers. DC power supply pin for the analog block (D/A converter) except operational amplifier output buffers. Ground pin for the analog block (D/A converter) except operational amplifier output buffers.
Power Supply
LD
12
I
Data Input/Output DI 14 I
DO
11
O
DAC Output AO1 AO2 AO3 AO4 AO5 AO6 AO7 AO8 15 2 3 4 5 6 7 10 O
4
MB88347
s FUNCTIONAL DESCRIPTION
OVERVIEW
The MB88347 is a R-2R resistor ladder type, 8-bit resolution digital-to-analog converter (DAC) device. The MB88347 has 8 channels of D/A converters with operational amplifier output buffers. 8-bit digital data are loaded into internal data latches by individual DAC channel units. The loaded digital data are converted into analog DC voltages through the internal D/A converter in max. 100 s settling time. And the analog DC voltages source/sink the output current through the operational amplifier output buffers. For cascade connection, a serial data output is provided.
DEVICE CONFIGURATION
As illustrated in BLOCK DIAGRAM, the MB88347 device is composed by the digital block (MCU interface) and analog block (D/A converter with operational amplifier output buffers). The digital block consists of a 12-bit shift register, a 4-bit address decoder, and 8-channels of 8-bit data latches. The analog block includes 8-channels of 8bit D/A converters with operational amplifier output buffers connecting to the data latches. For electrically stable operation the power supply and ground lines are separate between the digital block (MCU interface) and operational amplifier output buffers, and analog block except operational amplifier output buffers.
DEVICE OPERATION
Figure 2 shows the input/output timing. A 12-bit address/data is serially input into the shift register through the DI pin synchronously with the rising edge of CLK. The format of the shift register is shown in Figure 3. The lower 8 bits (D7 to D0) are data bits to be converted, and the upper 4 bits are address bits (D11 to D8) to select a data latch to be written. A high level on the LD pin loads the address decoder with the 4-bit address to select a data latch, and writes the 8-bit data into a selected data latch. Figure 4 shows the data latch address map, and Table 2, address decoding. 8-bit data written into individual data latches are converted into analog DC voltages, dividing the supply voltage |VDD-VSS| through R-2R resistor ladders of D/A converters. The operational amplifier output buffers at individual D/A converter outputs can source up to 1.0 mA of the output current. Figure 5 shows a configuration of the R-2R resistor ladder D/A converter with operational amplifier, and Table 3 analog DC voltages corresponding to each digital data. Figure 2 Input/Output Timing
CLK
MSB DI D11 D10 D9 D8 D2 D1
LSB D0
LD
AOx
Previous Data
New Data
5
MB88347
Figure 3 Shift Register Format
(Last-In) LSB DI D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10
(First-In) MSB DO D11
8-bit Data
4-bit Address
To Data Latch
To Address Decoder
Figure 4 Data Latch Address Map
Address 1H 2H 3H 4H 5H 6H 7H 8H Data Latch #1 Data Latch #2 Data Latch #3 Data Latch #4 Data Latch #5 Data Latch #6 Data Latch #7 Data Latch #8 D/A Converter #1 D/A Converter #2 D/A Converter #3 D/A Converter #4 D/A Converter #5 D/A Converter #6 D/A Converter #7 D/A Converter #8 Op-Amp. #1 Op-Amp. #2 Op-Amp. #3 Op-Amp. #4 Op-Amp. #5 Op-Amp. #6 Op-Amp. #7 Op-Amp. #8 AO1 AO2 AO3 AO4 AO5 AO6 AO7 AO8
6
MB88347
Figure 5 Configuration of R-2R Resistor Ladder D/A Converter with Operational Amplifier Output Biffer
VDD SW
VDD VSS
2R 2R D0 2R D1 2R D2 D a t a L a t c h 2R D3 2R D4 2R D5 2R D6 2R D7 R + - Operational Amplifier Output Buffer* AOx R R Internal Bias Generator * (Common to ch. #1-ch. #8) R R R R
* : Powered/grounded by the VCC and GND pins.
7
MB88347
Table 2 Address Decoding Address D8 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 D9 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 D10 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 D11 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 Table 3 Data Conversion Data D7 0 0 0 0
* * *
Data Latch Selected MB88347 Deselected Data Latch #1 Data Latch #2 Data Latch #3 Data Latch #4 Data Latch #5 Data Latch #6 Data Latch #7 Data Latch #8 Deselected Deselected Deselected Deselected Deselected Deselected Deselected
DAC Output Level D3 0 0 0 0
* * *
D6 0 0 0 0
* * *
D5 0 0 0 0
* * *
D4 0 0 0 0
* * *
D2 0 0 0 0
* * *
D1 0 0 1 1
* * *
D0 0 1 0 1
* * *
AOx VSS (VDD - VSS) x 1/255 + VSS (VDD - VSS) x 2/255 + VSS (VDD - VSS) x 3/255 + VSS
* * *
1 1
1 1
1 1
1 1
1 1
1 1
1 1
0 1
(VDD -VSS) x 254/255 + VSS VDD
8
MB88347
Figure 6 Cascade Connection Example
+5 V
VDD
VDD
VDD
Vcc DATA (SO) CLOCK Microcontroller (SC/TO) Strobe GND DI
MB88347 DO DI
MB88342* DO DI
MB88347 DO
CLK
CLK
CLK
********
LD
LD
LD
GND
VSS
GND
VSS
GND
VSS
* : MB88347 can be used mixed with MB88342.
9
MB88347
s APPLICATION DESCRIPTION
The MB88347 is suitable for electronic volumes and replacement for adjustment potentiometers, in addition to normal D/A converter applications. Figure 7 illustrates an application example for a gain control.
Figure 7 Application Example - Gain Control
+5 V
Input
VCC I/O port I/O port Microcontroller I/O port I/O port
VCC VDD DI CLK LD MB88347 DO Output AOx VSS Low reference voltage
GND GND
10
MB88347
s ELECTRICAL CHARACTERISTICS
ABSOLUTE MAXIMUM RATINGS (See NOTE)
Parameter Symbol VCC Supply Voltage Input Voltage Output Voltage Power Dissipation Operating Ambient Temperature Storage Temperature VDD VIN VOUT PD Ta TSTG Rating Min -0.3 -0.3 -0.3 -0.3 -- -20 -55 Typ -- -- -- -- -- -- -- Max +7.0 +7.0 VCC + 0.3 VCC + 0.3 250 +85 +150 Unit V V V V mW C C Condition Ta = +25C GND = 0 V VDD VCC, Ta = 25C GND = 0 V Should not exceed VCC + 0.3 V
NOTE: Permanent device damage may occur if the above ABSOLUTE MAXIMUM RATINGS are exceeded. Functional operation should be restricted to the conditions as detailed in the operational sections of this data sheet. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
RECOMMENDED OPERATING CONDITIONS
Parameter Supply Voltage (for MCU Interface/ Op.-Amp. Block) Supply Voltage (for Analog Block*) Analog Output Source Current Analog Output Sink Current Analog Output Load Capacitance for oscillation limit Operating Ambient Temperature Symbol VCC GND VDD VSS IAL IAH COL Ta Rating Min 4.5 -- 2.0 GND -- -- -- -20 Typ 5.0 0 -- -- -- -- -- -- Max 5.5 -- VCC VCC - 2.0 +1.0 +1.0 1.0 +85 Unit V V V V mA mA F C VCC VDD, VDD - VSS 2.0 V Condition
* : Except operational amplifier output buffer block
11
MB88347
s DC CHARACTERISTICS
(Recommended operating conditions unless otherwise noted.)
Digital Block (MCU) Interface
Parameter Supply Voltage (VCC) Supply Current (VCC) * Input Leakage Current (CLK, DI, and LD) Input Low Voltage (CLK, DI, and LD) Input High Voltage (CLK, DI, and LD) Output Low Voltage (DO) Output High Voltage (DO) Symbol VCC ICC IILK VIL VIH VOL VOH Value Min 4.5 -- -10 -- 0.5 * VCC -- VCC - 0.4 Typ 5.0 0.8 -- -- -- -- -- Max 5.5 1.8 +10 0.2 * VCC -- 0.4 -- Unit V mA A V V V V IOL = +2.5 mA IOH = -400 A CLK = 1 MHz, No load VIN = 0 to VCC Condition
* : Including the supply current to the operational amplifier block
Analog Block (D/A Converters with Operational Amplifier Output Buffers)
Parameter Supply Current (VDD) ** Supply Voltage (VDD) Resolution (AOx) Nonlinearity Error (AOx) Symbol IDD VDD VSS Res LE Value Min -- 2.0 GND -- -1.5 Typ 1.0 -- -- 8 -- Max 1.5 VCC VCC - 2.0 -- +1.5 Unit mA V V bits LSB Condition Unloaded VDD - VSS 2.0 V Monotonicity Unloaded,VDD VCC - 0.1 V, VSS 0.1 V See note and Figure 8 below. Unloaded,VDD VCC - 0.1 V, VSS 0.1 V See note below.
Differential Error (AOx)
DE
-1.0
0
+1.0
LSB
** :Excluding the supply current to the operational amplifier block NOTES: Nonlinearity Error : The difference between the input-output curve for the straight line (ideal line) that connects the output voltage of the channel when #00 is set, and the output voltage when #FF is set. Differential Error : The difference from the ideal increment value when the digital data is increased by 1 bit.
12
MB88347
Analog Block (D/A Converters with Operational Amplifier Output Buffers)
Parameter Min. Analog Output Voltage 1 (AOx) Min. Analog Output Voltage 2 (AOx) Min. Analog Output Voltage 3 (AOx) Min. Analog Output Voltage 4 (AOx) Min. Analog Output Voltage 5 (AOx) Max. Analog Output Voltage 1 (AOx) Max. Analog Output Voltage 2 (AOx) Max. Analog Output Voltage 3 (AOx) Max. Analog Output Voltage 4 (AOx) Max. Analog Output Voltage 5 (AOx) Symbol VAOL1 VAOL2 VAOL3 VAOL4 VAOL5 VAOH1 VAOH2 VAOH3 VAOH4 VAOH5 Value Min VSS VSS - 0.2 VSS VSS - 0.3 VSS VDD - 0.1 VDD - 0.2 VDD - 0.2 VDD - 0.3 VDD - 0.3 Typ -- VSS -- VSS -- -- -- VDD -- VDD Max VSS + 0.1 VSS + 0.2 VSS + 0.2 VSS + 0.3 VSS + 0.3 VDD VDD VDD + 0.2 VDD VDD + 0.3 Unit V V V V V V V V V V Condition VDD = VCC, VSS = GND = 0 V, IAL = 0 A, Digital Data = #00 VDD = VCC = 5.0 V, VSS = GND = 0 V, IAL = +500 A, Digital Data = #00 VDD = VCC = 5.0 V, VSS = GND = 0 V, IAH = +500 A, Digital Data = #00 VDD = VCC = 5.0 V, VSS = GND = 0 V, IAL = +1.0 mA, Digital Data = #00 VDD = VCC = 5.0 V, VSS = GND = 0 V, IAH = +1.0 mA, Digital Data = #00 VDD = VCC, VSS = GND = 0 V, IAL = 0 A, Digital Data = #FF VDD = VCC = 5.0 V, VSS = GND = 0 V, IAL = +500 A, Digital Data = #FF VDD = VCC = 5.0 V, VSS = GND = 0 V, IAH = +500 A, Digital Data = #FF VDD = VCC = 5.0 V, VSS = GND = 0 V, IAL = +1.0 mA, Digital Data = #FF VDD = VCC = 5.0 V, VSS = GND = 0 V, IAH = +1.0 mA, Digital Data = #FF
Figure 8 Definition of Nonlinearity Error
Analog output voltage End point line VAOH* Nonlinearity error
VAOL**
Digita data #00 #FF
* : VAOH is not always equal to VDD. ** : VAOL is not always equal to VSS.
13
MB88347
s AC CHARACTERISTICS
(Recommended operating conditions unless otherwise noted.) Parameter Clock Low Time Clock High Time Clock Rise Time Clock Fall Time Data Setup Time Data Hold Time Load Strobe High Time Load Strobe Setup Time Load Strobe Hold Time DAC Output Settling Time Data Output Delay Time Symbol tCKL tCKH tCr tCf tDCH tCHD tLDH tCHL tLDC tLDD tDO Value Min 200 200 -- -- 30 60 100 200 100 -- 70 Max -- -- 200 200 -- -- -- -- -- 100 350 Unit ns ns ns ns ns ns ns ns ns s ns *RAL = 10 k, CAL = 50 pF **CL = 20 pF (Min.), 100 pF (Max.) Condition
Figure 9 AC Test Conditions
* DAC Output Settling Time
* Data Output Delay Time
Device Under Test
Test Point
Device Under Test
Test Point
RAL *
CAL *
CL **
14
MB88347
Figure 10 Input/Output Timing
tcr 0.8*VCC 0.2*VCC tCKL
tCKH
tcf 0.8*VCC 0.2*VCC
CLK
0.2*VCC
0.2*VCC
DI
0.8*VCC 0.2*VCC tDCH tCHD
0.8*VCC 0.2*VCC tLDH tCHL
tLDC
LD
0.8*VCC 0.2*VCC tLDD
0.8*VCC 0.2*VCC
AOx
Previous Data
0.9*VCC New Data Valid 0.1*VCC
tDO
DO
Previous Data
0.8 VCC 0.2 VCC
New Data Valid
15
MB88347
Figure 11 Analog Output Voltage Range
R-2R Ladder Output (D/A Converter Output) VDD
Operational Amplifier Output (Buffer Output) VCC VAOH (VCC)
AOX Output Range (Linear Range)
VSS Notes: VDD = VCC VSS = GND
GND
VAOL (GND)
16
MB88347
s PACKAGE DIMENSIONS
16 pin, Plastic DIP (DIP-16P-M04)
19.55 -0.30 .770
+.008 -.012 +0.20
INDEX-1 INDEX-2 6.200.25 (.244.010)
4.36(.172)MAX
0.51(.020)MIN 0.250.05 (.010.002)
3.00(.118)MIN
0.460.08 (.018.003)
+0.30 +.012 +0.30 +.012
0.99 -0 1.27(.050) MAX
1.52 -0
.039 -0
.060 -0 2.54(.100) TYP
7.62(.300) TYP
15MAX
C
1994 FUJITSU LIMITED D16033S-2C-3
Dimensions in mm(inches).
17
MB88347
MB88347-PF
16 pin, Plastic SOP (FPT-16P-M06)
2.25(.089)MAX 10.15 -0.20 .400 -.008
+0.25 +.010
0.05(.002)MIN (STAND OFF)
INDEX
5.300.30 (.209.012) "B"
7.800.40 (.307.016)
6.80 -0.20 +.016 .268 -.008
+0.40
1.27(.050) TYP
0.450.10 (.018.004)
O0.13(.005)
M
0.15 -0.02 +.002 .006 -.001 Details of "A" part 0.40(.016)
+0.05
0.500.20 (.020.008)
Details of "B" part 0.15(.006) 0.20(.008)
"A" 0.10(.004) 8.89(.350)REF
0.20(.008) 0.18(.007)MAX 0.68(.027)MAX 0.18(.007)MAX 0.68(.027)MAX
C
1994 FUJITSU LIMITED F16015S-2C-4
Dimensions in mm(inches).
18
MB88347
MB88347-PFV
16 pin, Plastic SSOP (FPT-16P-M05)
* 5.000.10(.197.004)
+0.20
1.25 -0.10 +.008 .049 -.004
0.10(.004)
INDEX
*4.400.10
(.173.004)
6.400.20 (.252.008)
5.40(.213) NOM
0.650.12 (.0256.0047)
0.22 -0.05 +.004 .009 -.002
+0.10
"A"
0.15 -0.02 +.002 .006 -.001
+0.05
Details of "A" part 0.100.10(.004.004) (STAND OFF)
4.55(.179)REF
0
10
0.500.20 (.020.008)
C
1994 FUJITSU LIMITED F16013S-2C-4
Dimensions in mm(inches).
19
FUJITSU LIMITED
For further information please contact:
Japan FUJITSU LIMITED Corporate Global Business Support Division Electronic Devices KAWASAKI PLANT, 4-1-1, Kamikodanaka Nakahara-ku, Kawasaki-shi Kanagawa 211-88, Japan Tel: (044) 754-3763 Fax: (044) 754-3329 North and South America FUJITSU MICROELECTRONICS, INC. Semiconductor Division 3545 North First Street San Jose, CA 95134-1804, U.S.A. Tel: (408) 922-9000 Fax: (408) 432-9044/9045 Europe FUJITSU MIKROELEKTRONIK GmbH Am Siebenstein 6-10 63303 Dreieich-Buchschlag Germany Tel: (06103) 690-0 Fax: (06103) 690-122 Asia Pacific FUJITSU MICROELECTRONICS ASIA PTE. LIMITED #05-08, 151 Lorong Chuan New Tech Park Singapore 556741 Tel: (65) 281-0770 Fax: (65) 281-0220
All Rights Reserved. The contents of this document are subject to change without notice. Customers are advised to consult with FUJITSU sales representatives before ordering. The information and circuit diagrams in this document presented as examples of semiconductor device applications, and are not intended to be incorporated in devices for actual use. Also, FUJITSU is unable to assume responsibility for infringement of any patent rights or other rights of third parties arising from the use of this information or circuit diagrams. FUJITSU semiconductor devices are intended for use in standard applications (computers, office automation and other office equipment, industrial, communications, and measurement equipment, personal or household devices, etc.). CAUTION: Customers considering the use of our products in special applications where failure or abnormal operation may directly affect human lives or cause physical injury or property damage, or where extremely high levels of reliability are demanded (such as aerospace systems, atomic energy controls, sea floor repeaters, vehicle operating controls, medical devices for life support, etc.) are requested to consult with FUJITSU sales representatives before such use. The company will not be responsible for damages arising from such use without prior approval. Any semiconductor devices have inherently a certain rate of failure. You must protect against injury, damage or loss from such failures by incorporating safety design measures into your facility and equipment such as redundancy, fire protection, and prevention of over-current levels and other abnormal operating conditions. If any products described in this document represent goods or technologies subject to certain restrictions on export under the Foreign Exchange and Foreign Trade Control Law of Japan, the prior authorization by Japanese government should be required for export of those products from Japan.
F9703 (c) FUJITSU LIMITED Printed in Japan
24

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